to deliver RISC-V Trace solution.
HSINCHU, Taiwan, Dec 2, 2024 – Lauterbach and Andes Technology Corp. have announced their collaboration that enhances the debugging and tracing experience for engineers using Andes’ advanced NCETRACE200 trace IP with Lauterbach’s industry leading development tools TRACE32.
With the growing demand for RISC-V architectures in various applications, the combination of Lauterbach’s TRACE32 tools and Andes’ NCETRACE200 trace solution empowers developers to have deep, non-intrusive trace visibility into their System-on-Chip (SoC) to assist debug & trace, accelerate time-to-market and achieve higher levels of reliability, performance and efficiency in their embedded products
AndesCore NCETRACE200 subsystem is a non-intrusive tracing solution designed for the Andes RISC-V processor portfolio that spans from small, low-power MCUs to high-performance OoO application processors. Key features include:
- RISC-V N-Trace compatible trace encoder, timestamp generator and decoder
- Multi-core tracing, up to 8 RISC-V harts
- Configurable size Trace Buffer
- Mixed-ISA environment supported, including compatibility with the CoreSight technology by Arm.
“We are excited to support Andes Technology trace solution with our TRACE32 tools,” said Norbert Weiss, managing director at Lauterbach. “Our collaboration will provide engineers with the tools they need to maximize the potential of their RISC-V designs, fostering innovation and efficiency in embedded systems.”
Andes also expressed enthusiasm about the partnership. “Lauterbach is our long-term partner for many years. Working with Lauterbach allows us to deliver a comprehensive debug and trace experience to our customers, further solidifying our position in the embedded systems market,” said Dr. Charlie Su, president and CTO at Andes Technology. “This collaboration will pave the way for innovative developments in the RISC-V landscape, supporting a new generation of embedded solutions.”
For more information, visit andestech.com.
